SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 1098

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 45-6. TFT Panel Timing, CLKMOD = 0, VPW = 2, VBP = 2, VFP = 1
Figure 45-7. TFT Panel Timing (Line Expanded View), CLKMOD = 1
1098
LCDHSYNC
LCDVSYNC
LCDHSYNC
LCDVSYNC
LCDDOTCK
LCDHSYNC
LCDDOTCK
LCDVSYNC
LCDDEN
LCDDOTCK
LCDDEN
LCDDEN
SAM9M10
LCDD
LCDD
LCDD
VHDLY+1
VHDLY+1
Vertical Back Porch = VBP Lines
VHDLY+1
--------------------------- -
f
LCDVSYNC
Usually the LCD_FRM rate is about 70 Hz to 75 Hz. It is given by the following equation:
where:
In STN Mode:
1
• HOZVAL determines de number of LCDDOTCK cycles per line
• LINEVAL determines the number of LCDHSYNC cycles per frame, according to the
HPW+1
HPW+1
expressions shown below:
(VPW+1) Lines
=
VHDLY
------------------------------------------------------------------------------------------------------------------------- - VBP
HBP+1
HBP+1
HOZVAL
+
1 PCLK
1 PCLK
HPW
=
Horizontal_display_size
-------------------------------------------------------------- - 1
Line Period
+
Line Period
HBP
f
Number_data_lines
LCDDOTCK
Frame Period
1/2 PCLK 1/2 PCLK
+
1/2 PCLK 1/2 PCLK
HOZVAL
+
HOZVAL+1
HOZVAL+1
HFP
–
+
4
+
LINEVAL
Vertical Fron t Porch = VFP Lines
+
6355D–ATARM–7-Sep-11
VFP
HFP+VHDLY+2
HFP+VHDLY+2
+
1