SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 538

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 31-49. Slave Node Configuration, NACT = PUBLISH
Figure 31-50. Slave Node Configuration, NACT = SUBSCRIBE
Figure 31-51. Slave Node Configuration, NACT = IGNORE
31.7.8.22
538
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_THR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
Write
Read
Read
Read
Read
Read
SAM9M10
LIN Frame Handling With The Peripheral DMA Controller
Break
Break
Break
The USART can be used in association with the Peripheral DMA Controller (PDC) in order to
transfer data directly into/from the on- and off-chip memories without any processor intervention.
Synch
Synch
Synch
– Check the LIN errors
Protected
Protected
Protected
Identifier
Identifier
Identifier
Data 1
Data 2
Data 1
Data 1
Data 1
Data 1
Data 3
Data N-2
Data N
Data N-1
Data N-1
Data N-1
Data N-1
Data N
Data N
Data N
Data N
Checksum
Checksum
Checksum
6355D–ATARM–7-Sep-11

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