SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 1381

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
50.2.7
50.2.7.1
50.2.8
50.2.8.1
6355D–ATARM–7-Sep-11
Touch Screen (TSADCC)
USB High Speed Host Port (UHPHS) and Device Port (UDPHS)
TSADCC: Pen detect accuracy is not good
UHPHS/UDPHS: USB does not start after power-up
Depending on LCD panels, the pen detect is noisy, leading to an unpredictable behavior.
An additional resistor solves the problem. Its value (between 100 kOhm and 250 kOhm) is to be
tuned for the LCD panel.
The USB may not start properly at first use after power-up.
Booting out of the internal ROM fixes this issue because the workaround below is applied in the
ROM Code.
There are two possible workarounds.
Or
Warning: When booting out of the internal ROM, this workaround is not implemented and there-
fore SAMBA will not be functional.
Below is a possible implementation of the workaround:
1. Apply a hardware reset (NRST) after power-up.
2. Activate the PLLUTMI twice, following the procedure below:
Problem Fix/Workaround
Problem Fix/Workaround
/* First enable the UTMI PLL */
AT91C_BASE_PMC->CKGR_UCKR |= (AT91C_CKGR_UCKR_PLLCOUNT & (0x3 << 20)) |
AT91C_CKGR_UCKR_UPLLEN;
tmp =0;
while (((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_SR_LOCKU) == 0) && (tmp++ <
DELAY));
– a- Start The UTMI PLL an wait for the PLL lock bit
– b- Disable the UTMI PLL and wait 10 μseconds minimum
– c- Restart the UTMIPLL and wait for the PLL Lock bit
SAM9M10
1381

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