SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 1151
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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46.4
46.4.1
46.4.2
6355D–ATARM–7-Sep-11
Product Dependencies
Power Management
Interrupt
The Video Decoder requires a peripheral clock. The user has to enable UHP peripheral clock, bit
(1 << AT91C_ID_VDEC) in PMC_PCER register.
Software can reset the hardware synchronically by writing separate decoder and post-processor
enable bits to zero. These enable bits are located in the memory-mapped registers and they can
be used for terminating or restarting the decoding or post-processing at any time.
The Video Decoder has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Table 46-7.
Handling Video Decoder interrupts requires programming the AIC before.
Instance
VDEC
Peripheral IDs
30
ID
SAM9M10
1151
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