SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 539

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.7.8.23
Figure 31-52. Master Node with PDC (PDCM=1)
6355D–ATARM–7-Sep-11
WRITE BUFFER
IDENTIFIER
CHKTYP
CHKDIS
PARDIS
DATA N
DATA 0
FSDIS
NACT
DLM
DLC
|
|
|
|
Master Node Configuration
(DMA)
PDC
The PDC uses the trigger flags, TXRDY and RXRDY, to write or read into the USART. The PDC
always writes in the Transmit Holding register (US_THR) and it always reads in the Receive
Holding register (US_RHR). The size of the data written or read by the PDC in the USART is
always a byte.
The user can choose between two PDC modes by the PDCM bit in the LIN Mode register
(US_LINMR):
The WRITE buffer also contains the Identifier and the DATA, if the USART sends the response
(NACT = PUBLISH).
The READ buffer contains the DATA if the USART receives the response (NACT =
SUBSCRIBE).
• PDCM = 1: the LIN configuration is stored in the WRITE buffer and it is written by the PDC in
• PDCM = 0: the LIN configuration is not stored in the WRITE buffer and it must be written by
the Transmit Holding register US_THR (instead of the LIN Mode register US_LINMR).
Because the PDC transfer size is limited to a byte, the transfer is split into two accesses.
During the first access the bits, NACT, PARDIS, CHKDIS, CHKTYP, DLM and FDIS are
written. During the second access the 8-bit DLC field is written.
the user in the LIN Mode register (US_LINMR).
APB bus
RXRDY
NODE ACTION = PUBLISH
LIN CONTROLLER
USART3
WRITE BUFFER
READ BUFFER
IDENTIFIER
CHKTYP
PARDIS
CHKDIS
DATA N
DATA 0
FSDIS
NACT
DLM
DLC
|
|
|
|
(DMA)
PDC
APB bus
RXRDY
TXRDY
NODE ACTION = SUBSCRIBE
SAM9M10
LIN CONTROLLER
USART3
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