SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 1379

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

50.2
50.2.1
50.2.1.1
50.2.2
50.2.2.1
50.2.3
50.2.3.1
50.2.3.2
50.2.3.3
50.2.3.4
6355D–ATARM–7-Sep-11
SAM9M10 Errata - Rev. B Parts
Boot ROM
EMAC
Error Corrected Code Controller (ECC)
Boot ROM: NAND Flash boot does not support ECC Correction
EMAC: Setup Timing Violation in RMII Mode
Uncomplete parity status when error in ECC parity
Unsupported ECC per 512 words
Unsupported hardware ECC on 16-bit Nand Flash
ECC: Computation with a 1 clock cycle long NRD/NWE pulse
The boot ROM allows booting from block 0 of a NAND Flash connected on CS3. However, the
boot ROM does not feature ECC correction on a NAND Flash.
Most of the NAND Flash vendors do not guarantee anymore that block 0 is error free. Therefore
we advise to locate the bootstrap program into another device supported by the boot ROM
(DataFlash, Serial Flash, SDCARD or EEPROM), and to implement a NAND Flash access with
ECC.
None.
A setup timing violation occurs when using the EMAC in RMII mode only with I/Os in a 1.8V
range [1.65V:1.95V] and when the line load exceeds 20 pF. The RMII mode is fully functional
with I/Os in a 3.3V range [3.0V:3.6V].
None.
If the SMC is programmed with NRD/NWE pulse length equal to 1 clock cycle, ECC cannot com-
pute the parity.
It is recommended to program SMC with a value superior to 1.
When a single correctable error is detected in ECC value, the error is located in ECC Parity reg-
ister's field which contains a 1 in the 24 least significant bits except when the error is located in
the 12th or the 24th bit. In this case, these bits are always stuck at 0.
A Single correctable error is detected but it is impossible to correct it.
None.
1 bit ECC per 512 words is not functional.
Perform the ECC computation by software.
Hardware ECC on 16-bit Nand Flash is not supported.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
SAM9M10
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