SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 467

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Table 30-2.
Notes:
6355D–ATARM–7-Sep-11
Offset
0x0070
0x0074
0x0078
0x007C-0x009C
0x00A0
0x00A4
0x00A8
0x00AC
0x00C0
0x00C4
0x00C8
0x00CC
0x00C4-00E0
0x00E4
0x00E8
0x00F0-0x00F8
1. Reset value of PIO_PSR depends on the product implementation.
2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.
3. Reset value of PIO_PDSR depends on the level of the I/O lines. Reading the I/O line levels requires the clock of the PIO
4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have
5. Only this set of registers clears the status by writing 1 in the first register and sets the status by writing 1 in the second
Controller to be enabled, otherwise PIO_PDSR reads the levels present on the I/O line at the time the clock was disabled.
occurred.
register.
Register Mapping (Continued)
Register
Peripheral A Select Register
Peripheral B Select Register
AB Status Register
Reserved
Output Write Enable
Output Write Disable
Output Write Status Register
Reserved
I/O Delay Register 0
I/O Delay Register 1
I/O Delay Register 2
I/O Delay Register 3
Reserved
Write Protect Mode Register
Write Protect Status Register
Reserved
(5)
(5)
(5)
Name
PIO_ASR
PIO_BSR
PIO_ABSR
PIO_OWER
PIO_OWDR
PIO_OWSR
PIO_DELAYR0
PIO_DELAYR1
PIO_DELAYR2
PIO_DELAYR3
PIO_WPMR
PIO_WPSR
Read/Write
Read/Write
Read/Write
Read/Write
Read-write
Write-only
Write-only
Read-only
Write-only
Write-only
Read-only
Read-only
Access
SAM9M10
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
467

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