SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 735

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

35.13.8
Name:
Addresses:
Access:
• CSTOCYC: Completion Signal Timeout Cycle Number
• CSTOMUL: Completion Signal Timeout Multiplier
These fields determine the maximum number of Master Clock cycles that the HSMCI waits between two data block trans-
fers. Its value is calculated by (CSTOCYC x Multiplier).
These fields determine the maximum number of Master Clock cycles that the HSMCI waits between the end of the data
transfer and the assertion of the completion signal. The data transfer comprises data phase and the optional busy phase. If
a non-DATA ATA command is issued, the HSMCI starts waiting immediately after the end of the response until the comple-
tion signal.
Multiplier is defined by CSTOMUL as shown in the following table:
If the data time-out set by CSTOCYC and CSTOMUL has been exceeded, the Completion Signal Time-out Error flag
(CSTOE) in the HSMCI Status Register (HSMCI_SR) raises.
6355D–ATARM–7-Sep-11
31
23
15
–
–
–
7
–
HSMCI Completion Signal Timeout Register
0
0
0
0
1
1
1
1
30
22
14
HSMCI_CSTOR
0xFFF8001C (0), 0xFFFD001C (1)
Read-write
–
–
–
6
CSTOMUL
29
21
13
–
–
–
5
CSTOMUL
0
0
1
1
0
0
1
1
28
20
12
–
–
–
4
27
19
11
–
–
–
3
0
1
0
1
0
1
0
1
26
18
10
–
–
–
2
CSTOCYC
Multiplier
25
17
–
–
9
–
1
SAM9M10
1048576
65536
1024
4096
128
256
16
1
24
16
–
–
8
–
0
735