SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 161

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
20.2.2.3
20.2.2.4
6355D–ATARM–7-Sep-11
DDR2/SDR Controller
NAND Flash Error Corrected Code Controller
• Slow Clock mode supported
• Supports DDR/LPDDR, SDR-SDRAM and LPSDR
• Numerous Configurations Supported
• Programming Facilities
• Energy-saving Capabilities
• SDRAM Power-up Initialization by Software
• CAS Latency of 2, 3 Supported
• Auto Precharge Command Not Used
• SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported
• Tracking the accesses to a NAND Flash device by triggering on the corresponding chip select
• Single bit error correction and 2-bit Random detection.
• Automatic Hamming Code Calculation while writing
• Automatic Hamming Code Calculation while reading
– Programmable Data Float Time
– 2K, 4K, 8K, 16K Row Address Memory Parts
– SDRAM with Four Internal Banks
– SDR-SDRAM with 16- or 32- bit Data Path
– DDR2/LPDDR with 16- bit Data Path
– One Chip Select for SDRAM Device (256 Mbyte Address Space)
– Multibank Ping-pong Access (Up to 4 Banks Opened at Same Time = Reduces
– Timing Parameters Specified by Software
– Automatic Refresh Operation, Refresh Rate is Programmable
– Automatic Update of DS, TCR and PASR Parameters (LPSDR)
– Self-refresh, Power-down and Deep Power Modes Supported
– Clock Frequency Change in Precharge Power-down Mode Not Supported
– ECC value available in a register
– Error Report, including error flag, correctable error flag and word address being
– Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-bytes
Average Latency of Transactions)
detected erroneous
pages
SAM9M10
161

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