SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 542

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
31.7.8.26
542
SAM9M10
Bus Idle Time-out
If the LIN bus is inactive for a certain duration, the slave nodes shall automatically enter in sleep
mode. In the LIN 2.0 specification, this time-out is fixed at 4 seconds. In the LIN 1.3 specifica-
tion, it is fixed at 25000 Tbits.
In Slave Node configuration, the Receiver Time-out detects an idle condition on the RXD line.
When a time-out is detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises
and can generate an interrupt, thus indicating to the driver to go into sleep mode.
The time-out delay period (during which the receiver waits for a new character) is programmed
in the TO field of the Receiver Time-out Register (US_RTOR). If the TO field is programmed at
0, the Receiver Time-out is disabled and no time-out is detected. The TIMEOUT bit in US_CSR
remains at 0. Otherwise, the receiver loads a 17-bit counter with the value programmed in TO.
This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
If STTTO is performed, the counter clock is stopped until a first character is received.
If RETTO is performed, the counter starts counting down immediately from the value TO.
Table 31-16. Receiver Time-out programming
LIN Specification
2.0
1.3
19 200 bit/s
20 000 bit/s
Baud Rate
1 000 bit/s
2 400 bit/s
9 600 bit/s
-
Time-out period
25 000 Tbits
4s
6355D–ATARM–7-Sep-11
38 400
76 800
80 000
25 000
4 000
9 600
TO

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