SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 173

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SAM9M10

Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M10

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
20.2.8
20.2.8.1
6355D–ATARM–7-Sep-11
Hardware Configuration
Software Configuration
Implementation Examples
2x8-bit DDR2 on EBI
The following hardware configurations are given for illustration only. The user should refer to the
memory manufacturer web site to check current device availability.
The DDR2 initialization sequence is described in the sub-section “DDR2 Device Initialization” of
the DDRSDRC section.
• Assign EBI_CS1 to the DDR2 controller by setting the EBI_CS1A bit in the EBI Chip Select
• Initialize the DDR2 Controller depending on the DDR2 device and system bus frequency.
Register located in the bus matrix memory space.
SAM9M10
173

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