SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 352

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

26.10 Clock Switching Details
26.10.1
352
SAM9M10
Master Clock Switching Timings
Table 26-1
selected clock to another one. This is in the event that the prescaler is de-activated. When the
prescaler is activated, an additional time of 64 clock cycles of the new selected clock has to be
added.
Table 26-1.
To
Main Clock
SLCK
PLLA Clock
Peripheral clock 4 is disabled.
write_register(PMC_PCDR,0x00000010)
From
gives the worst case timings required for the Master Clock to switch from one
Clock Switching Timings (Worst Case)
PLLACOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLAx Clock
Main Clock
4.5 x SLCK
4 x SLCK +
–
PLLACOUNT x SLCK
2.5 x PLLA Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
–
PLLACOUNT x SLCK
2.5 x PLLA Clock +
3 x PLLA Clock +
3 x PLLA Clock +
1 x Main Clock
6355D–ATARM–7-Sep-11
PLLA Clock
4 x SLCK +
4 x SLCK +
5 x SLCK