SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 751

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

35.13.19 HSMCI Write Protect Status Register
Name:
Addresses:
Access:
• WP_VSRC: Write Protection Violation Status
• WP_VSRC: Write Protection Violation SouRCe
6355D–ATARM–7-Sep-11
31
23
15
0
0
0
0
0
0
0
0
0
0
0
7
-
-
30
22
14
0
0
0
0
0
0
0
0
1
1
1
HSMCI_WPSR
0xFFF800E8 (0), 0xFFFD00E8 (1)
Read-only
6
-
-
Other value
Other value
0
0
1
1
0
0
1
1
0
0
1
29
21
13
5
-
-
0
1
0
1
0
1
0
1
0
1
0
28
20
12
4
-
-
WP_VSRC
WP_VSRC
No Write Protection Violation occurred since the last read of this
register (WP_SR)
Write Protection detected unauthorized attempt to write a control
register had occurred (since the last read.)
Software reset had been performed while Write Protection was
enabled (since the last read).
Both Write Protection violation and software reset with Write
Protection enabled had occurred since the last read.
Reserved
No Write Protection Violation occurred since the last read of this
register (WP_SR)
Write access in HSMCI_MR while Write Protection was enabled
(since the last read).
Write access in HSMCI_DTOR while Write Protection was enabled
(since the last read)
Write access in HSMCI_SDCR while Write Protection was enabled
(since the last read)
Write access in HSMCI_CSTOR while Write Protection was
enabled (since the last read)
Write access in HSMCI_DMA while Write Protection was enabled
(since the last read)
Write access in HSMCI_CFG while Write Protection was enabled
(since the last read)
Reserved
27
19
11
3
-
26
18
10
2
-
WP_VSRC
WP_VS
WP_VS
25
17
9
1
-
SAM9M10
24
16
8
0
-
751