LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 641
LPC1810FET100,551
Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1810FET100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Table 549. MCPWM Control read address (CON - 0x400A 0000) bit description
<Document ID>
User manual
Bit
31
Symbol
DCMODE
26.7.1.2 MCPWM Control set address
26.7.1.3 MCPWM Control clear address
Value Description
0
1
Writing ones to this write-only address sets the corresponding bits in MCCON.
Table 550. MCPWM Control set address (CON_SET - 0x400A 0004) bit description
Writing ones to this write-only address clears the corresponding bits in CON.
Table 551. MCPWM Control clear address (CON_CLR - 0x400A 0008) bit description
Bit
0
1
2
3
4
7:5
8
9
10
11
12
15:13 -
16
17
18
19
20
28:21 -
29
30
31
Bit
0
1
2
3
Symbol
RUN0_CLR
CENTER0_CLR
POLA0_CLR
DTE0_CLR
3-phase DC mode select (see
3-phase DC mode off: PWM channels are independent (unless bit ACMODE = 1)
3-phase DC mode on: The internal MCOA0 output is routed through the CP register
(i.e. a mask) register to all six PWM outputs.
Symbol
RUN0_SET
CENTER0_SET
POLA0_SET
DTE0_SET
DISUP0_SET
-
RUN1_SET
CENTER1_SET
POLA1_SET
DTE1_SET
DISUP1_SET
RUN2_SET
CENTER2_SET
POLA2_SET
DTE2_SET
DISUP2_SET
INVBDC_SET
ACMODE_SET
DCMODE_SET
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
Writing a one clears the corresponding bit in the CON register. -
Writing a one clears the corresponding bit in the CON register. -
Writing a one clears the corresponding bit in the CON register. -
Writing a one clears the corresponding bit in the CON register. -
Chapter 26: LPC18xx Motor Control PWM (MOTOCONPWM)
Description
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Writing a one sets the corresponding bit in the CON register. -
Section
26.8.6).
UM10430
© NXP B.V. 2011. All rights reserved.
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value
Reset
value
Reset
value
0
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