LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 339

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LPC1810FET100,551

Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1810FET100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
<Document ID>
User manual
Table 285. Address mapping
A chip select can be connected to a single memory device, in this case the chip select
data bus width is the same as the device width. Alternatively the chip select can be
connected to a number of external devices. In this case the chip select data bus width is
the sum of the memory device data bus widths.
For example, for a chip select connected to:
The SDRAM bank select pins BA1 and BA0 are connected to address lines A14 and A13,
respectively.
14
1
1
1
1
1
1
1
1
1
1
32 bit external bus low-power SDRAM address mapping (Bank, Row, Column)
1
1
1
1
1
1
1
1
1
1
1
1
1
a 32-bit wide memory device, choose a 32-bit wide address mapping.
a 16-bit wide memory device, choose a 16-bit wide address mapping.
four x 8-bit wide memory devices, choose a 32-bit wide address mapping.
two x 8-bit wide memory devices, choose a 16-bit wide address mapping.
12
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
11:9 8:7
001
001
010
010
010
011
011
011
100
100
000
000
001
001
001
010
010
010
011
011
011
100
100
All information provided in this document is subject to legal disclaimers.
01
10
00
01
10
00
01
10
00
01
00
01
00
01
10
00
01
10
00
01
10
00
01
Description
64 Mb (4Mx16), 4 banks, row length = 12, column length = 8
64 Mb (2Mx32), 4 banks, row length = 11, column length = 8
128 Mb (16Mx8), 4 banks, row length = 12, column length = 10
128 Mb (8Mx16), 4 banks, row length = 12, column length = 9
128 Mb (4Mx32), 4 banks, row length = 12, column length = 8
256 Mb (32Mx8), 4 banks, row length = 13, column length = 10
256 Mb (16Mx16), 4 banks, row length = 13, column length = 9
256 Mb (8Mx32), 4 banks, row length = 13, column length = 8
512 Mb (64Mx8), 4 banks, row length = 13, column length = 11
512 Mb (32Mx16), 4 banks, row length = 13, column length = 10
16 Mb (2Mx8), 2 banks, row length = 11, column length = 9
16 Mb (1Mx16), 2 banks, row length = 11, column length = 8
64 Mb (8Mx8), 4 banks, row length = 12, column length = 9
64 Mb (4Mx16), 4 banks, row length = 12, column length = 8
64 Mb (2Mx32), 4 banks, row length = 11, column length = 8
128 Mb (16Mx8), 4 banks, row length = 12, column length = 10
128 Mb (8Mx16), 4 banks, row length = 12, column length = 9
128 Mb (4Mx32), 4 banks, row length = 12, column length = 8
256 Mb (32Mx8), 4 banks, row length = 13, column length = 10
256 Mb (16Mx16), 4 banks, row length = 13, column length = 9
256 Mb (8Mx32), 4 banks, row length = 13, column length = 8
512 Mb (64Mx8), 4 banks, row length = 13, column length = 11
512 Mb (32Mx16), 4 banks, row length = 13, column length = 10
Rev. 00.13 — 20 July 2011
Chapter 19: LPC18xx External Memory Controller (EMC)
UM10430
© NXP B.V. 2011. All rights reserved.
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