LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 1020

• Manufacturer Part Number: LPC1810FET100,551
• Description: IC MCU 32BIT 136KB FLSH 100TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1810FET100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 963. Pin description
<Document ID>
User manual
Symbol
P2_11
P2_12
P2_13
P3_0
P3_1
P3_2
P3_3
P3_4
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
F16
E15
C16
F13
G11
F11
B14
A15
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
I/O
O
I
I/O
I/O
O
-
I/O
I/O
I
-
I/O
I/O
O
I/O
O
I/O
I/O
I
O
I/O
I/O
O
O
-
-
I/O
O
I/O
-
-
I/O
All information provided in this document is subject to legal disclaimers.
GPIO1[11] — General purpose digital input/output pin.
CTOUT_5 — SCT output 5. Match output 1 of timer 1.
U2_RXD — Receiver input for USART2.
EXTBUS_A2 — External memory address line 2.
GPIO1[12] — General purpose digital input/output pin.
CTOUT_4 — SCT output 4. Match output 0 of timer 1.
n.c.
EXTBUS_A3 — External memory address line 3.
GPIO1[13] — General purpose digital input/output pin.
CTIN_4 — SCT input 4. Capture input 2 of timer 1.
n.c.
EXTBUS_A4 — External memory address line 4.
I2S_RX_SCK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
I2S_RX_MCLK — I2S receive master clock.
I2S_TX_SCK — I
the slave. Corresponds to the signal SCK in the I
I2S_TX_MCLK — I2S transmit master clock.
I2S_TX_WS — Transmit Word Select. It is driven by the master and received
by the slave. Corresponds to the signal WS in the I
I2S_RX_WS — Receive Word Select. It is driven by the master and received
by the slave. Corresponds to the signal WS in the I
CAN1_RD — CAN1 receiver input.
USB1_IND1 — USB1 port indicator LED control output 1.
I2S_TX_SDA — I
the receiver. Corresponds to the signal SD in the I
I2S_RX_SDA — I
the receiver. Corresponds to the signal SD in the I
CAN1_TD — CAN1 transmitter output.
USB1_IND0 — USB1 port indicator LED control output 0.
n.c.
n.c.
SSP0_SCK — Serial clock for SSP0.
SPIFI_SCK — Serial clock for SPIFI.
GPIO1[14] — General purpose digital input/output pin.
n.c.
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SPIFI_SIO3 — I/O lane 3 for SPIFI.
Rev. 00.13 — 20 July 2011
2
2
2
S transmit clock. It is driven by the master and received by
S transmit data. It is driven by the transmitter and read by
S Receive data. It is driven by the transmitter and read by
2
S-bus specification.
2
S-bus specification .
2
2
2
2
S-bus specification .
S-bus specification .
S-bus specification .
S-bus specification .
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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