NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 763

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

Serial Peripheral Interface (SPI)
20.2
20.2.1
20.2.1.1
20.2.1.2
Intel
®
ICH8 Family Datasheet
Flash Descriptor Registers
The following sections describe the data structure of the Flash Descriptor on the SPI
device. These are not registers within the ICH8.
Flash Descriptor Content
FLVALSIG—Flash Valid Signature Register
(Flash Descriptor Memory Mapped Configuration Registers)
Memory Address:FDBAR + 000h
FLMAP0—Flash Map 0 Register
(Flash Descriptor Memory Mapped Configuration Registers)
Memory Address:FDBAR + 004h
31:0h
31:27
26:24
23:16
15:10
9:8
7:0
Bits
Bits
Flash Valid Signature: This field identifies the Flash Descriptor sector as valid. If the
contents at this location contain 0FF0A55Ah, then the Flash Descriptor is considered
valid and it will operate in Descriptor Mode, else it will operate in Non-Descriptor Mode.
Reserved
Number Of Regions (NR): This field identifies the total number of Flash Regions. This
number is 0’s based, so a setting of all 0s indicates that the only Flash region is region
0, the Flash Descriptor region.
Flash Region Base Address (FRBA): This identifies address bits [11:4] for the
Region portion of the Flash Descriptor. Bits [24:12] and bits [3:0] are 0.
For validation purposes, the recommended FRBA is: 04h
Reserved
Number Of Components (NC): This field identifies the total number of Flash
Components. Each supported Flash Component requires a separate chip select
00 = 1 Component
01 = 2 Components
All other settings = Reserved
Flash Component Base Address (FCBA): This identifies address bits [11:4] for the
component portion of the Flash Descriptor. Bits [24:12] and bits [3:0] are 0.
For validation purposes, the recommended FCBA is: 01h.
Description
Description
Size:
Size:
32 bits
32 bits
763