NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 178
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
- Current page: 178 of 890
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Table 73.
178
Addr
I/O
00h
01h
02h
03h
04h
05h
06h
07h
# of
Rds
2
2
2
2
2
2
2
2
Access
Write Only Registers with Read Paths in ALT Access Mode (Sheet 1 of 2)
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Restore Data
DMA Chan 0 base address low
byte
DMA Chan 0 base address high
byte
DMA Chan 0 base count low
byte
DMA Chan 0 base count high
byte
DMA Chan 1 base address low
byte
DMA Chan 1 base address high
byte
DMA Chan 1 base count low
byte
DMA Chan 1 base count high
byte
DMA Chan 2 base address low
byte
DMA Chan 2 base address high
byte
DMA Chan 2 base count low
byte
DMA Chan 2 base count high
byte
DMA Chan 3 base address low
byte
DMA Chan 3 base address high
byte
DMA Chan 3 base count low
byte
DMA Chan 3 base count high
byte
Data
Addr
I/O
40h
41h
42h
70h
C4h
C6h
C8h
# of
Rds
7
1
1
1
2
2
2
Access
1
2
3
4
5
6
7
1
2
1
2
1
2
Restore Data
Timer Counter 0 status, bits
[5:0]
Timer Counter 0 base count
low byte
Timer Counter 0 base count
high byte
Timer Counter 1 base count
low byte
Timer Counter 1 base count
high byte
Timer Counter 2 base count
low byte
Timer Counter 2 base count
high byte
Timer Counter 1 status, bits
[5:0]
Timer Counter 2 status, bits
[5:0]
Bit 7 = NMI Enable,
Bits [6:0] = RTC Address
DMA Chan 5 base address low
byte
DMA Chan 5 base address
high byte
DMA Chan 5 base count low
byte
DMA Chan 5 base count high
byte
DMA Chan 6 base address low
byte
DMA Chan 6 base address
high byte
Intel
®
Functional Description
ICH8 Family Datasheet
Data
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