NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 274
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
- Current page: 274 of 890
- Download datasheet (7Mb)
7.1.17
7.1.18
7.1.19
274
ULBA—Upstream Link Base Address Register
Offset Address: 0118–011Fh
Default Value:
RP1D—Root Port 1 Descriptor Register
Offset Address: 0120–0123h
Default Value:
RP1BA—Root Port 1 Base Address Register
Offset Address: 0128–012Fh
Default Value:
63:32
31:24
23:16
63:32
31:28
27:20
19:15
14:12
31:0
15:2
11:0
Bit
Bit
Bit
1
0
Base Address Upper (BAU) — R/WO. This field is programmed by platform BIOS to
match the upper 32-bits of base address of the (G)MCH RCRB that is attached to this
RCRB.
Base Address Lower (BAL) — R/WO. This field is programmed by platform BIOS to
match the lower 32-bits of base address of the (G)MCH RCRB that is attached to this
RCRB.
Target Port Number (PN) — RO. Indicates the target port number is 1h (root port
#1).
Target Component ID (TCID) — R/WO. This field returns the value of the ESD.CID
(offset 0104h, bits 23:16) field programmed by platform BIOS, since the root port is
in the same component as the RCRB.
Reserved
Link Type (LT) — RO. Indicates that the link points to a root port.
Link Valid (LV) — RO. When FD.PE1D (offset 3418h, bit 16) is set, this link is not
valid (returns 0). When FD.PE1D is cleared, this link is valid (returns 1).
Reserved
Reserved
Bus Number (BN) — RO. Indicates the root port is on bus #0.
Device Number (DN) — RO. Indicates the root port is on device #28.
Function Number (FN) — RO. Indicates the root port is on function #0.
Reserved
0000000000000000h
01xx0002h
00000000000E0000h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Size:
Attribute:
Chipset Configuration Registers
R/WO
64-bit
R/WO, RO
32-bit
RO
64-bit
Intel
®
ICH8 Family Datasheet
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