NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 281
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
- Current page: 281 of 890
- Download datasheet (7Mb)
Chipset Configuration Registers
7.1.37
7.1.38
7.1.39
Intel
®
ICH8 Family Datasheet
CIR3 — Chipset Initialization Register 3
Offset Address: 01FC–01FDh
Default Value:
CIR4 — Chipset Initialization Register 4
Offset Address: 0200–0201h
Default Value:
BCR — Backbone Configuration Register
Offset Address: 0220–0223h
Default Value:
15:11
15:14
10:8
13:8
31:7
7:4
1:0
7:6
5:0
5:3
2:0
Bit
Bit
Bit
3
2
6
Reserved
CIR3 Field 3 — R/W. BIOS must program this field to 110b.
Reserved
CIR3 Field 2 — R/W. BIOS must set this bit.
Reserved
CIR3 Field 1 — R/W. BIOS must program this field to 11b.
Reserved
CIR4 Field 2 — R/W. BIOS must program this field to 10 0000b
Reserved
CIR4 Field 1 — R/W. BIOS must program this field to 00 1000b.
Reserved
BCR Field 2 — R/W. BIOS must set this bit.
Reserved
BCR Field 1 — R/W. BIOS program this field to 101b
0000h
0000h
00000000h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W, RO
16-bit
R/W, RO
16-bit
R/W
32-bit
281
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