NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 171

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NH82801HEM S LA5R

Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801HEM S LA5R

Lead Free Status / RoHS Status
Compliant
Functional Description
Table 68.
Table 69.
Intel
®
ICH8 Family Datasheet
Causes of Wake Events (Sheet 2 of 2)
NOTES:
1.
2.
3.
It is important to understand that the various GPIs have different levels of functionality
when used as wake events. The GPIs that reside in the core power well can only
generate wake events from sleep states where the core well is powered. Also, only
certain GPIs are “ACPI Compliant,” meaning that their Status and Enable bits reside in
ACPI I/O space.
GPI Wake Events
The latency to exit the various Sleep states varies greatly and is heavily dependent on
power supply design, so much so that the exit latencies due to the ICH8 are
insignificant.
PCI_EXP_WAKE#
PCI_EXP PME
Message
SMBALERT#
SMBus Slave
Message
SMBus Host
Notify message
received
GPI[15:8]
GPI[7:0]
GPI
Cause
This is a wake event from S5 only if the sleep state was entered by setting the SLP_EN and
SLP_TYP bits via software, or if there is a power failure.
If in the S5 state due to a power button override or THRMTRIP#, the possible wake events
are due to Power Button, Hard Reset Without Cycling (See Command Type 3 in
and Hard Reset System (See Command Type 4 in
When the WAKE# pin is active and the PCI Express device is enabled to wake the system,
the ICH8 will wake the platform.
Power Well
Table 69
Resume
Wake From
States Can
Core
S1–S5
S1–S5
S1–S5
S1–S5
S1
summarizes the use of GPIs as wake events.
Wake From
PCI_EXP_WAKE bit (Note 3)
Must use the PCI Express* WAKE# pin rather than messages
for wake from S3,S4, or S5.
Always enabled as Wake event
Wake/SMI# command always enabled as a Wake event.
NOTE: SMBus Slave Message can wake the system from S1–
HOST_NOTIFY_WKEN bit SMBus Slave Command register.
Reported in the SMB_WAK_STS bit in the GPEO_STS register.
S1–S5
S1
S5, as well as from S5 due to Power Button Override.
Compliant
Compliant
Notes
ACPI
ACPI
Table
How Enabled
93).
Table
93),
171

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