NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 286

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

7.1.48
7.1.49
7.1.50
286
DMC—DMI Miscellaneous Control Register (Mobile Only)
Offset Address: 2010–2013h
Default Value:
CIR6—Chipset Initialization Register 6 (Mobile Only)
Offset Address: 2024–2027h
Default Value:
CIR7—Chipset Initialization Register 7
Offset Address: 2034–2037h
Default Value:
31:24
23:21
31:20
19:16
31:2
20:8
15:0
6:0
Bit
Bit
Bit
1
0
7
Reserved
DMI Misc. Control Field 1 — R/W. BIOS shall always program this field as per the
BIOS Specification.
0 = Disable DMI Power Savings.
1 = Enable DMI Power Savings.
Reserved
Reserved
CIR6 Field 2 — R/W. (Mobile Only) BIOS must program this field to 011b.
Reserved
CIR6 Field 1 — R/W. BIOS must clear this bit.
Reserved
Reserved
CIR7 Field 1 — R/W. BIOS must program this field to 0101b.
Reserved
NA
0B2030xxh
B2B477CCh
Description
Description
Description
Size:
Attribute:
Size:
Size:
Attribute:
Attribute:
Chipset Configuration Registers
R/W
32-bit
R/W, RO
32-bit
R/W
32-bit
Intel
®
ICH8 Family Datasheet