HD6473258P10 Renesas Electronics America, HD6473258P10 Datasheet - Page 5

IC H8 MCU OTP 32K 64DIP

HD6473258P10

Manufacturer Part Number
HD6473258P10
Description
IC H8 MCU OTP 32K 64DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Datasheet

Specifications of HD6473258P10

Core Processor
H8/300
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Peripherals
-

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3.6
3.7
Section 4. Exception Handling
4.1
4.2
4.3
4.4
Section 5. I/O Ports
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
3.5.8
CPU States ............................................................................................................................ 54
3.6.1
3.6.2
3.6.3
Access Timing and Bus Cycle .............................................................................................. 56
3.7.1
3.7.2
Overview............................................................................................................................... 61
Reset ..................................................................................................................................... 61
4.2.1
4.2.2
4.2.3
Interrupts............................................................................................................................... 64
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
Note on Stack Handling........................................................................................................ 75
Overview............................................................................................................................... 77
Port 1..................................................................................................................................... 78
Port 2..................................................................................................................................... 81
Port 3..................................................................................................................................... 84
Port 4..................................................................................................................................... 87
Port 5..................................................................................................................................... 94
Port 6..................................................................................................................................... 99
Port 7..................................................................................................................................... 104
Block Data Transfer Instruction .............................................................................. 52
Program Execution State ......................................................................................... 55
Exception-Handling State........................................................................................ 55
Power-Down State ................................................................................................... 56
Access to On-Chip Memory (RAM and ROM) ...................................................... 56
Access to On-Chip Register Field and External Devices ........................................ 58
Overview ................................................................................................................. 61
Reset Sequence ........................................................................................................ 61
Disabling of Interrupts after Reset........................................................................... 64
Overview ................................................................................................................. 64
Interrupt-Related Registers...................................................................................... 65
External Interrupts ................................................................................................... 68
Internal Interrupts .................................................................................................... 69
Interrupt Handling ................................................................................................... 70
Interrupt Response Time.......................................................................................... 75
................................................................................................................ 77
............................................................................................ 61
ii

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