HD6473258P10 Renesas Electronics America, HD6473258P10 Datasheet - Page 185

• Manufacturer Part Number: HD6473258P10
• Description: IC H8 MCU OTP 32K 64DIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/325r

Specifications of HD6473258P10

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI, UART/USART
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Peripherals: -

Bit 5 – Overrun Error (ORER): This bit indicates an overrun error during reception.
Bit 5
ORER
Bit 4 – Framing Error (FER): This bit indicates a framing error during data reception in asyn-
chronous mode. It has no meaning in synchronous mode.
Bit 4
FER
Bit 3 – Parity Error (PER): This bit indicates a parity error during data reception in asynchro-
nous mode, when a communication format with parity bits is used.
This bit has no meaning in synchronous mode, or when a communication format without parity bits
is used.
Bit 3
PER
Bits 2 to 0 – Reserved: These bits cannot be modified and are always read as 1.
0
1
0
1
0
1
Description
To clear ORER, the CPU must read ORER after
it has been set to 1, then write a 0 in this bit.
This bit is set to 1 if reception of the next character ends while
the receive data register is still full (RDRF = 1).
Description
To clear FER, the CPU must read FER after
it has been set to 1, then write a 0 in this bit.
This bit is set to 1 if a framing error occurs (stop bit = 0).
Description
To clear PER, the CPU must read PER after
it has been set to 1, then write a 0 in this bit.
This bit is set to 1 when a parity error occurs (the parity of the
received data does not match the parity selected by the O/E bit
in the SMR).
178
(Initial value)
(Initial value)
(Initial value)