HD6473258P10 Renesas Electronics America, HD6473258P10 Datasheet - Page 126

IC H8 MCU OTP 32K 64DIP

HD6473258P10

Manufacturer Part Number
HD6473258P10
Description
IC H8 MCU OTP 32K 64DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Datasheet

Specifications of HD6473258P10

Core Processor
H8/300
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Peripherals
-

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Bit 6—Input Strobe Interrupt Enable (ISIE): Enables or disables the handshake interrupt
request (ISI).
Bit 6
ISIE
0
1
Bit 5—Output Strobe Enable (OSE): Enables or disables output of the output strobe signal. Do
not set OSE to 1 in the expanded modes (modes 1 and 2).
Bit 5
OSE
0
1
Bit 4—Output Strobe Select (OSS): Selects whether to generate an output strobe signal when the
port 3 data register (P3DR) is written, or when it is read.
Bit 4
OSS
0
1
Bit 3—Latch Enable (LTE): Controls the input latches of port 3. Do not set LTE to 1 in the
expanded modes (modes 1 and 2).
When LTE is set to 1, input data are latched on the falling edge of IS. The data are retained in the
input latch until the port 3 data register (P3DR) is read, after which the next data can be latched.
Bit 3
LTE
0
1
Description
The handshake interrupt request (ISI) is disabled.
The handshake interrupt request (ISI) is enabled.
Description
The output strobe signal is disabled.
The output strobe signal is enabled.
Description
An output strobe signal is output when P3DR is read.
An output strobe signal is output when P3DR is written.
Description
Port 3 input data are not latched.
Port 3 input data are latched on the falling edge of IS.
117
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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