HD6473258P10 Renesas Electronics America, HD6473258P10 Datasheet - Page 26

IC H8 MCU OTP 32K 64DIP

HD6473258P10

Manufacturer Part Number
HD6473258P10
Description
IC H8 MCU OTP 32K 64DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Datasheet

Specifications of HD6473258P10

Core Processor
H8/300
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Peripherals
-

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2.2 Mode Descriptions
Mode 1 (Expanded Mode without On-Chip ROM): Mode 1 supports a 64-kbyte address space
most of which is off-chip. In particular, the interrupt vector table is located in off-chip memory. The
on-chip ROM is not used. Software can select whether to use the on-chip RAM. Ports 1, 2, 3 and 7
are used for the address and data bus lines and control signals as follows:
Ports 1 and 2:
Port 3:
Port 7 (partly):
Mode 2 (Expanded Mode with On-Chip ROM): Mode 2 supports a 64-kbyte address space
which includes the on-chip ROM. Software can select whether or not to use the on-chip RAM, and
can select the usage of pins in ports 1 and 2.
Ports 1 and 2:
Port 3:
Port 7 (partly):
Note: In mode 2, ports 1 and 2 are initially general-purpose input ports. Software must change the
Mode 3 (Single-Chip Mode): In this mode all memory is on-chip. Since no off-chip memory is
accessed, there is no external address bus. All ports are available for general-purpose input and
output.
2.3 Address Space Map
Figures 2-1 to 2-6 show memory maps of the H8/3257, H8/3256, H8/325, H8/324, H8/323, and
H8/322 in each of the three operating modes. The on-chip register field consists of control, status,
and data registers for the on-chip supporting modules and I/O ports.
Off-chip addresses can be accessed only in the expanded modes. Access to an off-chip address in
the single-chip mode does not cause an address error, but all 1 data are returned.
2.3.1 Access Speed
On-chip ROM and RAM are accessed a word (16 bits) at a time in two states. (A “state” is one
system clock cycle.) The on-chip register field is accessed a byte at a time in three states.
desired pins to output before using them for the address bus. See section 5, I/O Ports for
details.
Address bus
Data bus
Bus control signals
Address bus (see note)
Data bus
Bus control signals
16

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