HD6473258P10 Renesas Electronics America, HD6473258P10 Datasheet - Page 204

• Manufacturer Part Number: HD6473258P10
• Description: IC H8 MCU OTP 32K 64DIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/325r

Specifications of HD6473258P10

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI, UART/USART
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Peripherals: -

10.3 RAM Enable Bit (RAME)
The on-chip RAM is enabled or disabled by the RAME (RAM Enable) bit in the system control
register (SYSCR). Table 10-1 lists information about the system control register.
Table 10-1. System Control Register
Name
System control register
Bit
Initial value
Read/Write
The only bit in the system control register that concerns the on-chip RAM is the RAME bit. See
section 2.4.2, System Control Register for the other bits.
Bit 0 – RAM Enable (RAME): This bit enables or disables the on-chip RAM.
The RAME bit is initialized to 1 on the rising edge of the RES signal, so a reset enables the on-chip
RAM. The RAME bit is not initialized in the software standby mode.
Bit 7
RAME
10.4 Operation
10.4.1 Expanded Modes (Modes 1 and 2)
If the RAME bit is set to 1, accesses to the following addresses are directed to the on-chip RAM.
H8/3257, H8/3256: H'F780 to H'FF7F
H8/325, H8/324: H'FB80 to H'FF7F
H8/323: H'FD80 to H'FF7F
H8/322: H'FE80 to H'FF7F
If the RAME bit is cleared to 0, accesses to these addresses are directed to the external data bus.
0
1
Description
On-chip RAM is disabled.
On-chip RAM is enabled.
SSBY
R/W
7
0
STS2
R/W
Abbreviation
SYSCR
6
0
STS1
R/W
5
0
R/W
R/W
STS0
198
R/W
4
0
Initial value
H’0B
—
—
3
1
NMIEG
R/W
2
0
Address
H’FFC4
—
—
1
1
(Initial value)
RAME
R/W
0
1