DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 714

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
The bit rate is calculated by measuring the period of transfer of a low-level byte (H'00) from the
host. The bit rate can be changed by the command for a new bit rate selection. After the bit rate
has been adjusted, the boot program enters the inquiry and selection state. The bit-rate-adjustment
sequence is shown in figure 20.20.
(3)
After adjustment of the bit rate, the protocol for communications between the host and the boot
program is as shown below.
1. 1-byte commands and 1-byte responses
2. n-byte commands or n-byte responses
3. Error response
4. Programming of 128 bytes
5. Memory read response
Rev. 3.00, 03/04, page 672 of 830
These commands and responses are comprised of a single byte. These are consists of the
inquiries and the ACK for successful completion.
These commands and responses are comprised of n bytes of data. These are selections and
responses to inquiries.
The amount of programming data is not included under this heading because it is determined
in another command.
The error response is a response to inquiries. It consists of an error response and an error code
and comes two bytes.
The size is not specified in commands. The size of n is indicated in response to the
programming unit inquiry.
Bit-Rate-Adjustment State
Communications Protocol
Host
Figure 20.20 Bit-Rate-Adjustment Sequence
H'00 (Completion of adjustment)
H'E6 (Boot response)
H'00 (30 times maximum)
(H'FF (error))
H'55
Boot Program
Measuring the
1-bit length