DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 521

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Receive Operation Using the HNDS Function (HNDS = 1):
Figure 15.17 shows the sample flowchart for the operations in slave receive mode (HNDS = 1).
Figure 15.17 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 1)
Read AASX, AAS and ADZ in ICSR
No
No
No
and HNDS = 1 in ICXR
Set ACKB = 0 in ICSR
ReadICDR, clear IRIC
Set ACKB = 1 in ICSR
and TRS = 0 in ICCR
Slave receive mode
Clear IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Read TRS in ICCR
Read IRIC in ICCR
Last reception?
and ADZ = 1?
Set MST = 0
Initialize IIC
ICDRF
Read ICDR
Read ICDR
ESTP = 1 or
TRS = 1?
IRIC
IRIC
IRIC
STOP = 1?
AAS = 1
End
= 1?
= 1?
= 1?
Yes
Yes
Yes
= 1?
Yes
No
No
Yes
No
No
No
Yes
Yes
Yes
[2] Read the receive data remaining unread.
[1] Initialization. Select slave receive mode.
[3] to [7] Wait for one byte to be received (slave address + R/W)
[10] Read the receive data. The first read is a dummy read.
[5] to [7] Wait for the reception to end.
[8] Clear IRIC
[10] Read the receive data.
[8] Clear IRIC
[9] Set acknowledge data for the last reception.
[5] to [7] Wait for the reception to end.
or
[11] Detect stop condition
[12] Check STOP
[8] Clear IRIC
[12] Clear IRIC
Slave transmit mode
General call address processing
* Description omitted
Rev. 3.00, 03/04, page 479 of 830