DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 572

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
Rev. 3.00, 03/04, page 530 of 830
Bit
1
0
Bit Name Initial Value Slave Host Description
IBF1
OBF1
*
Only 0 can be written to clear the flag.
0
0
R
R/(W)* R
R/W
R
Input Data Register Full
Indicates whether or not there is receive data in
IDR1. This bit is an internal interrupt source to the
slave processor (this LSI).
The IBF1 flag setting and clearing conditions are
different when the fast A20 gate is used. For details
see table 16.7.
0: There is not receive data in IDR1
[Clearing condition]
When the slave processor reads IDR
1: There is receive data in IDR1
[Setting condition]
When the host processor writes to IDR using I/O
write cycle
Output Data Register Full
Indicates whether or not there is transmit data in
ODR1.
0: There is not transmit data in ODR1
[Clearing condition]
When the host processor reads ODR1 using I/O
read cycle, or the slave processor writes 0 to the
OBF1 bit
1: There is transmit data in ODR1
[Setting condition]
When the slave processor writes to ODR1

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