DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 691

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3)
The procedures for download, initialization, and erasing are shown in figure 20.12.
The procedure program must be executed in an area other than the user MAT to be erased.
Especially the part where the SCO bit in FCCS is set to 1 for downloading must be executed in the
on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 20.4.4, Procedure Program and Storable Area for
Programming Data.
For the downloaded on-chip program area, refer to the RAM map for programming/erasing in
figure 20.10.
A single divided block is erased by one erasing processing. For block divisions, refer to figure
20.4. To erase two or more blocks, update the erase block number and perform the erasing
processing for each block.
Erasing Procedure in User Program Mode
JSR FTDAR setting + 32
Select on-chip program
to be downloaded and
Start erasing procedure
destination by FTDAR
specify download
Set SCO to 1 and
execute download
Set FKEY to H'A5
Set the FPEFEQ
Clear FKEY to 0
Initialization
FPFR = 0 ?
DPFR = 0?
parameter
program
1
Yes
Yes
Initialization error processing
Download error processing
No
No
1.
Figure 20.12 Erasing Procedure
No
JSR FTDAR setting + 16
Disable interrupts and
bus master operation
Set FEBS parameter
procedure program
Set FKEY to H'5A
Rev. 3.00, 03/04, page 649 of 830
Clear FKEY to 0
other than CPU
Required block
End erasing
FPFR = 0 ?
completed?
erasing is
Erasing
1
Yes
Yes
Clear FKEY and erasing
No
error processing
2.
3.
4.
5.
6.