DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 151

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
4
3
2
1
0
Bit Name
AST
WMS1
WMS0
WC1
WC0
Initial
Value
1
0
0
1
1
R/W
R/W
R/W
R/W
R/W
R/W
Description
Basic Extended Area Access State Control
Selects the number of states for access to the basic extended
area. This bit also enables or disables wait-state insertion.
[ADMXE = 0] Normal extension
0: 2-state access space. Wait state insertion disabled
1: 3-state access space. Wait state insertion enabled
[ADMXE = 1] Address-data multiplex extension
0: 2-state data access space. Wait state insertion disabled
1: 3-state data access space. Wait state insertion enabled
When the CS256E bit in SYSCR and the CPCSE bit in BCR2
are set to 1, this bit setting is ignored in 256-kbyte extended
area access and CP extended area access.
Basic Extended Area Wait Mode Select 1 and 0
Selects the wait mode for access to the basic extended area
when the AST bit is set to 1.
00: Program wait mode
01: Wait disabled mode
10: Pin wait mode
11: Pin auto-wait mode
When the CS256E bit in SYSCR and the CPCSE bit in BCR2
are set to 1, this bit setting is ignored in 256-kbyte extended
area access and CP extended area access.
Basic Extended Area Wait Count 1 and 0
Selects the number of program wait states to be inserted
when the basic extended area is accessed when the AST bit
is set
to 1. The program wait state is only inserted into data cycles.
00: Program wait state is not inserted
01: 1 program wait state is inserted
10: 2 program wait states are inserted
11: 3 program wait states are inserted
When the CS256E bit in SYSCR and the CPCSE bit in BCR2
are set to 1, this bit setting is ignored in 256-kbyte extended
area access and CP extended area access.
Rev. 3.00, 03/04, page 109 of 830