DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 498

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
4
3
Rev. 3.00, 03/04, page 456 of 830
Bit Name
AASX
AL
Initial
Value
0
0
R/W
R/(W)* Second Slave Address Recognition Flag
R/(W)* Arbitration Lost Flag
Description
In I
the first frame following a start condition matches bits
SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave receive
mode and FSX = 0 in SARX
[Clearing conditions]
•
•
•
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL=0
•
•
When ALSL=1
•
•
[Clearing conditions]
•
•
2
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the internal SCL line is high at the fall of SCL in
master mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the SDA pin is driven low by another device before the
I
condition instruction was executed in master transmit
mode
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AL after reading AL = 1
C bus format slave receive mode, this flag is set to 1 if
2
C bus interface drives the SDA pin low, after the start