DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 321

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.2
Table 11.1 lists the FRT input and output pins.
Table 11.1 Pin Configuration
11.3
The FRT has the following registers.
• Free-running counter (FRC)
• Output compare register A (OCRA)
• Output compare register B (OCRB)
• Input capture register A (ICRA)
• Input capture register B (ICRB)
• Input capture register C (ICRC)
• Input capture register D (ICRD)
• Output compare register AR (OCRAR)
• Output compare register AF (OCRAF)
• Output compare register DM (OCRDM)
• Timer interrupt enable register (TIER)
• Timer control/status register (TCSR)
• Timer control register (TCR)
• Timer output compare control register (TOCR)
Note: OCRA and OCRB share the same address. Register selection is controlled by the OCRS
Name
Counter clock input pin
Output compare A output pin
Output compare B output pin
Input capture A input pin
Input capture B input pin
Input capture C input pin
Input capture D input pin
bit in TOCR. ICRA, ICRB, and ICRC share the same addresses with OCRAR, OCRAF,
and OCRDM. Register selection is controlled by the ICRS bit in TOCR.
Input/Output Pins
Register Descriptions
Abbreviation
FTCI
FTOA
FTOB
FTIA
FTIB
FTIC
FTID
I/O
Input
Output
Output
Input
Input
Input
Input
Output compare A output
Output compare B output
Function
FRC counter clock input
Input capture A input
Input capture B input
Input capture C input
Input capture D input
Rev. 3.00, 03/04, page 279 of 830