AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 965

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

Figure 45-10. Line and Polygon Clipping
45.3.1.11
6249H–ATARM–27-Jul-09
(0,13)
(0,0)
Y
(1,8)
C4(2,10)
C1(2,2)
Draw Command Queuing
(2,1)
PIXEL DRAWN
PIXEL NOT DRAWN
CLIP RECTANGLE
Multiple block transfer, line draw or fill commands can be issued to the TDGC by writing the
commands to a 64 x 16-bit wide FIFO. All drawing specific registers can be written via writes to
the FIFO by writing the address, length and the register value to the command queue.
Length is based on the number of consecutive register writes. All accesses to the command
queue FIFO are by reading/writing to the 16-bit wide TDGC_CQR. The pointer to the command
queue is automatically incremented by the controller. FIFO command size is limited to 64 half
words.
(4,5)
(5,1)
(5,4)
(8,11)
DISPLAY
(8,1)
(8,5)
X
(11,2)
(12,1)
(12,3)
(13,2)
AT91SAM9263
C3(15,10)
C2(15,2)
(16,3)
(16,8)
(17,13)
(17,0)
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