AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 665

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

37.7.2
6249H–ATARM–27-Jul-09
CAN Controller Interrupt Handling
Figure 37-10. Possible Initialization Procedure
There are two different types of interrupts. One type of interrupt is a message-object related
interrupt, the other is a system interrupt that handles errors or system-related interrupt sources.
All interrupt sources can be masked by writing the corresponding field in the CAN_IDR register.
They can be unmasked by writing to the CAN_IER register. After a power-up reset, all interrupt
sources are disabled (masked). The current mask status can be checked by reading the
CAN_IMR register.
The CAN_SR register gives all interrupt source states.
The following events may initiate one of the two interrupts:
• Message object interrupt
• System interrupts
– Data registers in the mailbox object are available to the application. In Receive
– A sent transmission was aborted.
– Bus off interrupt: The CAN module enters the bus off state.
– Error passive interrupt: The CAN module enters Error Passive Mode.
– Error Active Mode: The CAN module is neither in Error Passive Mode nor in Bus Off
Mode, a new message was received. In Transmit Mode, a message was transmitted
successfully.
mode.
Configure a Mailbox in Reception Mode
Enable CAN Controller Interrupt Line
(ABM == 1 and CANEN == 1)
Enable CAN Controller Clock
(CAN_SR or CAN_MSRx)
ABM = 0 and CANEN = 0
CANEN = 1 (ABM == 0)
Change CAN_BR value
End of Initialization
Errors ?
(PMC)
(AIC)
No
Yes
AT91SAM9263
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