AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 887
AT91SAM9263B-CU
Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9263B-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625
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Price
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• RXRSM: UDP Resume Interrupt Status
0 = No UDP Resume Interrupt pending.
1 =UDP Resume Interrupt has been raised.
The USB device sets this bit when a UDP resume signal is detected at its port.
After reset, the state of this bit is undefined, the application must clear this bit by setting the RXRSM flag in the UDP_ICR
register.
• SOFINT: Start of Frame Interrupt Status
0 = No Start of Frame Interrupt pending.
1 = Start of Frame Interrupt has been raised.
This interrupt is raised each time a SOF token has been detected. It can be used as a synchronization signal by using
isochronous endpoints.
• ENDBUSRES: End of BUS Reset Interrupt Status
0 = No End of Bus Reset Interrupt pending.
1 = End of Bus Reset Interrupt has been raised.
This interrupt is raised at the end of a UDP reset sequence. The USB device must prepare to receive requests on the end-
point 0. The host starts the enumeration, then performs the configuration.
• WAKEUP: UDP Resume Interrupt Status
0 = No Wakeup Interrupt pending.
1 = A Wakeup Interrupt (USB Host Sent a RESUME or RESET) occurred since the last clear.
After reset the state of this bit is undefined, the application must clear this bit by setting the WAKEUP flag in the UDP_ICR
register.
AT91SAM9263
887
6249H–ATARM–27-Jul-09
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