AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 27

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

8.2.4
9. System Controller
6249H–ATARM–27-Jul-09
Error Corrected Code Controller
The System Controller is a set of peripherals that allow handling of key elements of the system,
such as power, resets, clocks, time, interrupts, watchdog, etc.
The System Controller User Interface also embeds registers that are used to configure the Bus
Matrix and a set of registers for the chip configuration. The chip configuration registers can be
used to configure:
The System Controller peripherals are all mapped within the highest 16 Kbytes of address
space, between addresses 0xFFFF C000 and 0xFFFF FFFF.
However, all the registers of the System Controller are mapped on the top of the address space.
This allows all the registers of the System Controller to be addressed from a single pointer by
using the standard ARM instruction set, as the Load/Store instructions have an indexing mode of
± 4 Kbytes.
Figure 9-1 on page 28
Figure 8-1 on page 21
peripherals.
• Energy-saving capabilities
• Error detection
• SDRAM Power-up Initialization by software
• CAS Latency of 1, 2 and 3 supported
• Auto Precharge Command not used
• Tracking the accesses to a NAND Flash device by triggering on the corresponding chip select
• Single-bit error correction and two-bit random detection
• Automatic Hamming Code Calculation while writing
• Automatic Hamming Code Calculation while reading
– Self-refresh, power down and deep power down modes supported
– Refresh Error Interrupt
– ECC value available in a register
– Error Report, including error flag, correctable error flag and word address being
– Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-byte
– EBI0 and EBI1 chip select assignment and voltage range for external memories
– ARM Processor Tightly Coupled Memories
detected erroneous
pages
shows the System Controller block diagram.
shows the mapping of the User Interfaces of the System Controller
AT91SAM9263
27