AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 287

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

25.3.5.5
6249H–ATARM–27-Jul-09
Multi-block Transfer with Source Address Auto-reloaded and Linked List Destination Address (Row7)
Figure 25-10. DMA Transfer Flow for Source and Destination Address Auto-reloaded
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Set up the chain of linked list items (otherwise known as block descriptors) in memory.
Write the control information in the LLI.DMAC_CTLx register location of the block
descriptor for each LLI in memory for channel x. For example, in the register you can
program the following:
a. Set up the transfer type (memory or non-memory peripheral for source and desti-
b. Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_TR_WIDTH field.
– ii. Transfer width for the destination in the DST_TR_WIDTH field.
– iii. Source master layer in the SMS field where source resides.
– iv. Destination master layer in the DMS field where destination resides.
– v. Incrementing/decrementing or fixed address for source in SINC field.
nation) and flow control peripheral by programming the TT_FC of the DMAC_CTLx
register.
DMAC transfer Complete
interrupt generated here
Channel Disabled by
hardware
Block Complete interrupt
generated here
yes
interrupt cleared by software
Reload SARx, DARx, CTLx
DMAC State Machine Table?
Stall until block complete
Channel Enabled by
MASKBLOCK[x]=1?
Is DMAC in Row1 of
CTLx.INT_EN=1
Block Transfer
software
&&
yes
no
AT91SAM9263
no
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