AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 1040

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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47.8.3
47.8.3.1
Table 47-21. SMC Read Signals - NRD Controlled (READ_MODE = 1)
Table 47-22. SMC Read Signals - NCS Controlled (READ_MODE = 0)
1040
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
1
2
3
4
5
6
7
8
9
10
11
AT91SAM9263
EBI 1 timings
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
A2 - A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
Read Timings
Parameter
Data Setup before NCS High
Data Hold after NCS High
Data Setup before NCS High
Data Hold after NCS High
NBS0/A0, NBS1, NBS2/A1, NBS3,
VDDCORE supply
VDDCORE supply
VDDIOM supply
VDDIOM supply
HOLD or NO HOLD SETTINGS (nrd hold … 0, nrd hold =0)
NO HOLD SETTINGS (ncs rd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
HOLD SETTINGS (ncs rd hold … 0)
HOLD SETTINGS (nrd hold … 0)
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
t
1.08V
1.08V
CPMCK
15.2
11.6
16.7
13.1
-3.2
-2.9
-3.2
-2.8
- 2.7
- 1.6
1.8V
1.8V
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
t
CPMCK
1.2V
1.2V
13.1
10.5
12.0
-3.2
-2.8
-3.2
-2.9
9.4
- 2.0
- 1.2
Min
Min
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
CPMCK
1.08V
1.08V
16.1
12.5
-2.9
-2.5
14.6
11.0
-3.0
-2.6
- 3.1
- 2.0
- 0.1
3.3V
3.3V
nrd pulse - ncs
(nrd setup +
(nrd setup +
t
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
CPMCK
1.2V
12.5
-2.9
-2.5
1.2V
11.5
9.9
-3.0
-2.6
8.9
6249H–ATARM–27-Jul-09
- 2.4
- 1.5
- 0.1
Units
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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