AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 271

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

6249H–ATARM–27-Jul-09
Figure 25-2. DMAC Transfer Hierarchy for Non-Memory Peripheral
Figure 25-3. DMAC Transfer Hierarchy for Memory
Block: A block of DMAC data. The amount of data (block length) is determined by the flow con-
troller. For transfers between the DMAC and memory, a block is broken directly into a sequence
of AMBA bursts and AMBA single transfers. For transfers between the DMAC and a non-mem-
ory peripheral, a block is broken into a sequence of DMAC transactions (single and bursts).
These are in turn broken into a sequence of AMBA transfers.
Transaction: A basic unit of a DMAC transfer as determined by either the hardware or software
handshaking interface. A transaction is only relevant for transfers between the DMAC and a
source or destination peripheral if the source or destination peripheral is a non-memory device.
There are two types of transactions: single and burst.
– Single transaction: The length of a single transaction is always 1 and is converted
– Burst transaction: The length of a burst transaction is programmed into the DMAC.
Transaction
Transfer
AMBA
to a single AMBA transfer.
The burst transaction is converted into a sequence of AMBA bursts and AMBA
single transfers. DMAC executes each AMBA burst transfer by performing
incremental bursts that are no longer than the maximum AMBA burst size set. The
Burst
Block
Burst
Transfer
AMBA
Burst
Block
Transaction
Transfer
AMBA
Burst
Burst
Block
DMAC Transfer
Transfer
AMBA
Burst
Block
DMAC Transfer
Transaction
Transfer
AMBA
Burst
Burst
Block
Transfer
AMBA
Burst
Transfer
AMBA
Single
Block
Transfer
AMBA
Single
Transaction
Transfer
AMBA
Single
Single
Block Transfer
Level
AMBA Transfer
Level
AT91SAM9263
DMA Transfer
Level
Block Transfer
Level
DMA Transaction
Level
AMBA Transfer
Level
DMA Transfer
Level
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