AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 455

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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Figure 32-3. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 32-4. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
32.6.3
6249H–ATARM–27-Jul-09
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(to slave)
Master Mode Operations
SPCK
SPCK
MOSI
MISO
SPCK
SPCK
MOSI
MISO
NSS
NSS
* Not defined, but normally MSB of previous character received.
*
When configured in Master Mode, the SPI operates on the clock generated by the internal pro-
grammable baud rate generator. It fully controls the data transfers to and from the slave(s)
* Not defined but normally LSB of previous character transmitted.
MSB
1
1
MSB
MSB
MSB
2
2
6
6
6
6
3
3
5
5
5
5
4
4
4
4
4
4
5
5
3
3
3
3
6
6
6
2
2
2
2
7
7
1
1
1
1
AT91SAM9263
8
8
LSB
LSB
LSB
LSB
*
455

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