AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 903

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

44.5.2.4
Table 44-4.
Table 44-5.
6249H–ATARM–27-Jul-09
Pixel 1bpp
Pixel 2bpp
Pixel 4bpp
Pixel 8bpp
Pixel
16bpp
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Pixel 1bpp
Pixel 2bpp
Pixel 4bpp
Pixel 8bpp
Pixel
16bpp
Mem Addr
Mem Addr
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
15
0
Serializer
1
Little Endian Memory Organization
Big Endian Memory Organization
7
0
2
14
1
not used
3
0x3
0x3
3
1
0
4
This block serializes the data read from memory. It reads words from the FIFO and outputs pix-
els (1 bit, 2 bits, 4 bits, 8 bits, 16 bits or 24 bits wide) depending on the format specified in the
PIXELSIZE field of the LCDCON2 register. It also adapts the memory-ordering format. Both big-
endian and little-endian formats are supported. They are configured in the MEMOR field of the
LCDCON2 register.
The organization of the pixel data in the memory depends on the configuration and is shown in
Table 44-4
Note:
13
2
5
6
1
6
12
3
For a color depth of 24 bits per pixel there are two different formats supported: packed and
unpacked. The packed format needs less memory but has some limitations when working in 2D
addressing mode
7
and
1
2
0
8
11
4
Table
9
5
2
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
10
5
44-5.
(See “2D Memory Addressing” on page
0x2
0x2
2
3
1
6
9
4
3
8
7
7
8
3
4
6
9
0x1
0x1
1
0
0
2
10
5
922.).
2
5
11
4
8
8
8
0
1
1
AT91SAM9263
7
7
7
12
3
6
6
6
1
6
5
5
5
13
2
4
4
4
0x0
0x0
0
2
3
3
3
3
14
1
2
2
2
0
7
1
1
1
15
0
903
0
0
0