AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 194

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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22.7
22.7.1
22.7.2
194
Connection to External Devices
AT91SAM9263
Data Bus Width
Byte Write or Byte Select Access
A data bus width of 8, 16, or 32 bits can be selected for each chip select. This option is con-
trolled by the field DBW in SMC_MODE (Mode Register) for the corresponding chip select.
Figure 22-3
connect a 512K x 16-bit memory on NCS2.
as a single 32-bit memory
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of
write access: byte write or byte select access. This is controlled by the BAT field of the
SMC_MODE register for the corresponding chip select.
Figure 22-3.
Figure 22-4.
shows how to connect a 512K x 8-bit memory on NCS2.
Memory Connection for an 8-bit Data Bus
Memory Connection for a 16-bit Data Bus
SMC
SMC
D[15:0]
NCS[2]
A[19:2]
NBS0
NBS1
NWE
NCS[2]
A[18:2]
NRD
D[7:0]
NWE
A1
NRD
A0
A1
Figure 22-5
shows two 16-bit memories connected
D[7:0]
A[18:2]
Write Enable
Output Enable
Memory Enable
D[15:0]
A[18:1]
A[0]
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
A0
A1
Figure 22-4
6249H–ATARM–27-Jul-09
shows how to

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