AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 1090

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

1090
Revision
6249E
AT91SAM9263
Comments (Continued)
DMAC:
Figure 25-4, “External DMA Request Timing,” on page
Section 25.3.3.5 ”External DMA Request
ends...” added to 4th paragraph.
Multiple bits represented by “x” in Bit names from
327
Section 25.4.7 ”Configuration Register for Channel x
previous paragraph.
Section 25.4 ”DMA Controller (DMAC) User
address 0x3a4, 0x3b8 is reserved.
Debug and Test
Figure 12-6, “AMP Mictor Connector
Table 12-3, ”AT91SAM9263 JTAG Boundary Scan
updated for bit 203.
EMAC:
Section 41.3.1 ”Clock”
GPBR:
The General Purpose Backup Registers section has been added.
ISI:
Section 46.4.7 ”ISI Preview
LCDC:
Section 44.10.2 ”TFT Mode
MCI:
Section 40.1
PMC and CKGR:
Section 28.1
Section 28.3 ”Processor Clock
Figure 27-1, “Typical Slow Clock Crystal Oscillator
Section 27.4.2 ”Divider and Phase Lock Loop
initialization.
Section 28.7 ”Programming
in step 3: “Setting PLLA and divider A”, ICPPLA requirement added to 1st paragraph.
in step 4: “Setting PLLB and divider B”, ICPPLB requirement added to 1st paragraph.
Section 28.7 ”Programming
in step 6, “Selection of Master CLock and Processor Clock”, 4th paragraph, this text has been added: “By
default, the PRES parameter is set to 0 which means that master clock is equal to slow clock.”
PWM:
Section 38.6 ”Pulse Width Modulation Controller (PWM) User
indexed. (see
Section 38.6.13 ”PWM Channel Update Register”
RSTC:
Section 14.3.4.4 ”Software
”Overview”, MCI supports Multimedia Card (MMC) Specification V3.31
”Overview”: “PCK must be switched off........”
Table 38-2 on page
added to Functional Description
Reset”, PERRST must be used with PROCRST, except for debug purposes.
Register”: PREV_HSIZE and PREV_VSIZE updated with RGB only comments.
Example”, “HFP....” line, typo corrected: “HPW = (64-2)”
Sequence”;
Sequence”;
Controller”, new information added explaining Idle Mode.
719)
Orientation”, replaced internal product reference in figure.
Definition”, 3rd paragraph CTLxL.xxx typos fixed. “The DMA
Interface”, DMA_IdReg, DMAC_DmaTestReg removed.
Programming”, added the last line, specific to PLLA and PLLB
Section 25.4.11 on page 315
Fixed typos in table: CPD (PWM_CMRx Register)
Register”, pin names assigned to bits 517, 205. pin name
Connection”, corrected GNDPLL to GNDBU
High”, SRC_PER bitfield description unscrambled from
275, updated.
Interface”, Channel-dependent registers are
to
Section 25.4.23 on page
6249H–ATARM–27-Jul-09
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