AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 775
AT91SAM9263B-CU
Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9263B-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625
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Manufacturer
Quantity
Price
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40.7.2
6249H–ATARM–27-Jul-09
Data Transfer Operation
Figure 40-9. Command/Response Functional Flow Diagram
Note:
The MultiMedia Card allows several read/write operations (single block, multiple blocks, stream,
etc.). These kind of transfers can be selected setting the Transfer Type (TRTYP) field in the MCI
Command Register (MCI_CMDR).
These operations can be done using the features of the Peripheral DMA Controller (PDC). If the
PDCMODE bit is set in MCI_MR, then all reads and writes use the PDC facilities.
In all cases, the block length (BLKLEN field) must be defined either in the mode register
MCI_MR, or in the Block Register MCI_BLKR. This field determines the size of the data block.
Enabling PDC Force Byte Transfer (PDCFBYTE bit in the MCI_MR) allows the PDC to manage
with internal byte transfers, so that transfer of blocks with a size different from modulo 4 can be
supported. When PDC Force Byte Transfer is disabled, the PDC type of transfers are in words,
otherwise the type of transfers are in bytes.
If the command is SEND_OP_COND, the CRC error flag is always present (refer to R3 response
in the MultiMedia Card specification).
Check error bits in the
Wait for command
status register
ready status flag
(1)
Set the command argument
MCI_ARGR = Argument
Read response if required
MCI_CMDR = Command
Status error flags?
Set the command
Read MCI_SR
RETURN OK
CMDRDY
1
(1)
RETURN ERROR (1)
AT91SAM9263
Yes
0
775
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