AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 309

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

25.4.6
Name: DMAC_CFGxL
Addresses:0x00800040 [0], 0x00800098 [1]
Access: Read-write
Reset: 0x0
The address offset for each channel is: 0x40+[x * 0x58]
For example, CFG0: 0x040, CFG1: 0x098, etc.
• CH_PRIOR: Channel Priority
A priority of 7 is the highest priority, and 0 is the lowest. This field must be programmed within the following range [0, x – 1]
A programmed value outside this range causes erroneous behavior.
• CH_SUSP: Channel Suspend
Suspends all DMA data transfers from the source until this bit is cleared. There is no guarantee that the current transaction
will complete. Can also be used in conjunction with DMAC_CFGx.FIFO_EMPTY to cleanly disable a channel without losing
any data.
0 = Not Suspended.
1 = Suspend. Suspend DMA transfer from the source.
• FIFO_EMPTY
Indicates if there is data left in the channel's FIFO. Can be used in conjunction with DMAC_CFGx.CH_SUSP to cleanly dis-
able a channel.
1 = Channel's FIFO empty
0 = Channel's FIFO not empty
• HS_SEL_DST: Destination Software or Hardware Handshaking Select
This register selects which of the handshaking interfaces, hardware or software, is active for destination requests on this
channel.
0 = Hardware handshaking interface. Software-initiated transaction requests are ignored.
1 = Software handshaking interface. Hardware Initiated transaction requests are ignored.
If the destination peripheral is memory, then this bit is ignored.
• HS_SEL_SRC: Source Software or Hardware Handshaking Select
This register selects which of the handshaking interfaces, hardware or software, is active for source requests on this
channel.
6249H–ATARM–27-Jul-09
RELOAD_DS
31
23
15
7
LOCK_B_L
Configuration Register for Channel x Low
RELOAD_SR
CH_PRIOR
30
22
14
6
MAX_ABRST
29
21
13
5
LOCK_CH_L
28
20
12
4
–
SR_HS_POL
HS_SEL_SR
27
19
11
3
–
MAX_ABRST
DS_HS_POL
HS_SEL_DS
26
18
10
2
–
FIFO_EMPT
AT91SAM9263
LOCK_B
25
17
9
1
–
LOCK_CH
CH_SUSP
24
16
8
0
–
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