AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 30

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

9.5
9.6
9.7
30
Power Management Controller
Periodic Interval Timer
Watchdog Timer
AT91SAM9263
Figure 9-3.
• Provides:
• Five flexible operating modes:
• Includes a 20-bit Periodic Counter, with less than 1 µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real-time OS or Linux
• 16-bit key-protected Counter, programmable only once
– the Processor Clock PCK
– the Master Clock MCK, in particular to the Matrix and the memory interfaces
– the USB Device Clock UDPCK
– the USB Host Clock UHPCK
– independent peripheral clocks, typically at the frequency of MCK
– four programmable clock outputs: PCK0 to PCK3
– Normal Mode with processor and peripherals running at a programmable frequency
– Idle Mode with processor stopped while waiting for an interrupt
– Slow Clock Mode with processor and peripherals running at low frequency
– Standby Mode, mix of Idle and Backup Mode, with peripherals running at low
– Backup Mode with Main Power Supplies off, VDDBU powered by a battery
frequency, processor stopped waiting for an interrupt
PLLBCK
MAINCK
PLLACK
AT91SAM9263 Power Management Controller Block Diagram
SLCK
Master Clock Controller
®
/WindowsCE
/1,/2,/4,...,/64
Prescaler
MAINCK
PLLACK
PLLBCK
PLLBCK
SLCK
Programmable Clock Controller
®
compliant tick generator
Divider
/1,/2,/4
USB Clock Controller
Divider
/1,/2,/4
/1,/2,/4,...,/64
Prescaler
ON/OFF
Clock Controller
Processor
Controller
Idle Mode
ON/OFF
Clock
Peripherals
ON/OFF
MCK
PCK
int
periph_clk[..]
pck[..]
UDPCK
UHPCK
6249H–ATARM–27-Jul-09