AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 179

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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21.5.7
21.5.7.1
21.5.7.2
6249H–ATARM–27-Jul-09
NAND Flash Support
External Bus Interface 0
External Bus Interface 1
External Bus Interfaces 0 and 1 integrate circuitry that interfaces to NAND Flash devices.
The NAND Flash logic is driven by the Static Memory Controller on the NCS3 address space.
Programming the EBI0_CS3A field in the EBI0_CSA Register in the Chip Configuration User
Interface to the appropriate value enables the NAND Flash logic. For details on this register,
refer to the Bus Matrix Section. Access to an external NAND Flash device is then made by
accessing the address space reserved to NCS3 (i.e., between 0x4000 0000 and 0x4FFF FFFF).
The NAND Flash Logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCS3 signal is active. NANDOE and NANDWE are invalidated
as soon as the transfer address fails to lie in the NCS3 address space. See Figure
Signal Multiplexing on EBI Pins” on page 179
forms, refer to the Static Memory Controller section.
Figure 21-7. NAND Flash Signal Multiplexing on EBI Pins
The NAND Flash logic is driven by the Static Memory Controller on the NCS2 address space.
Programming the EBI1_CS2A field in the EBI1_CSA Register in the Chip Configuration User
Interface to the appropriate value enables the NAND Flash logic. For details on this register,
refer to the Bus Matrix Section. Access to an external NAND Flash device is then made by
accessing the address space reserved to NCS2 (i.e., between 0x9000 0000 and 0x9FFF FFFF).
The NAND Flash Logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCS2 signal is active. NANDOE and NANDWE are invalidated
as soon as the transfer address fails to lie in the NCS2 address space. See
179
section.
for more information. For details on these waveforms, refer to the Static Memory Controller
SMC
NWR0_NWE
NCSx
NRD
NAND Flash Logic
for more information. For details on these wave-
NANDOE
NANDWE
AT91SAM9263
Figure 21-7 on page
NANDOE
NANDWE
“NAND Flash
179

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