sed1355 ETC-unknow, sed1355 Datasheet - Page 99

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
7.5.9 16-Bit Dual Color Passive LCD Panel Timing
VDP
VNDP
HDP
HNDP
Hardware Functional Specification
Issue Date: 99/05/18
UD[7:0], LD[7:0]
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
= Horizontal Non-Display Period
FPFRAME
FPSHIFT
UD7, LD7
UD6, LD6
UD5, LD5
UD4, LD4
UD3, LD3
UD1, LD1
UD2, LD2
UD0, LD0
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPLINE
FPLINE
MOD
MOD
Figure 7-40: 16-Bit Dual Color Passive LCD Panel Timing
241-R1
241-G1
241-B 1
241-R2
241-G2
241-B 2
241-R3
241-G3
1-R1,
1-G1,
1-R2,
1-G2,
1-R3,
1-G3,
1-B1,
1-B2,
LINE 1/241
241-R4
241-G 4
241-R5
241-G 5
241-B5
241-R6
241-B 3
241-B 4
1-B3,
1-R4,
1-G4,
1-B4,
1-R5,
1-G5,
1-B5,
1-R6,
LINE 2/242
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= ((REG[05h] bits [4:0]) + 1)*8Ts
LINE 3/243
LINE 4/244
HDP
VDP
LINE 239/479 LINE 240/480
VNDP
241-G638
241-B638
241-R639
241-G63
241-G 640
241-B639
241-R640
241-B640
1-G640,
1-G638,
1-B638,
1-R639,
1-G639,
1-B639,
1-R640,
1-B640,
9
HNDP
LINE 1/241
LINE 2/242
X23A-A-001-11
SED1355
Page 93